Electronic products operating in the millimeter-wave frequency range may be based on gallium arsenide (GaAs) or indium phosphide (InP) semiconductor technologies to provide the speed and power necessary for applications such as personal-area networks and automotive radars, for example. However, to reduce cost and power consumption, the system sizes of these gallium arsenide (GaAs) or indium phosphide (InP) based semiconductor products are required to be dramatically reduced.
It has been demonstrated that silicon germanium (SiGe) process technologies are well positioned to provide the speed and power solutions in the millimeter-wave frequency range, such as for highly integrated radio circuits, for example. However, standard silicon substrates usually have a low resistivity and therefore the substrate may greatly impact the signal loss of on-chip interconnects at millimeter-wave frequencies. Thus, at millimeter-wave frequencies, the lossy substrate may greatly impact the signal loss of input/output connections (IOs), for example, depending on the physical size of the input/output connections.
Input/output connections such as on-chip circuit pads are designed for lower frequency operation. FIGS. 1A-B show respectively a front view and a side view of an exemplary embodiment of an on-chip circuit pad provided on a substrate. As shown in FIGS. 1A-B, an on-chip circuit pad may consist of a top-metal plate 110 having an octagonal shape, for example. It should be appreciated that the pad is large enough, such as 100×100 μm, to provide the spatial structure for wire-bond or flip-chip ball packaging, for example.
As shown in FIGS. 1A-B, the circuit pad 110 is provided on a substrate 100, wherein a solid metal shield 112 is provided below the circuit pad 110 to reduce loss induced by the substrate 100. In the embodiment shown in FIGS. 1A-B, a spacing h1 between circuit pad 110 and the metal shield 112 is provided on the substrate 100 and is maximized to minimize the parasitic capacitance formed between the circuit pad 110 and the metal shield 112. That is, as the spacing h1 increases, the parasitic capacitance decreases.
As shown in FIGS. 1A-B, a feed line 114 is provided to connect the pad structure to an on-chip circuitry such as an input buffer or an output driver. In a typical communication system, the structure may be a low noise amplifier or a power amplifier.